Computer organization mcqs fast adders

YOU CAN DOWNLOAD 200+ SUBJECTS PDF BOOK FOR COMPETITIVE EXAMINATIONS

CLICK HERE TO DOWNLOAD

Computer organization mcqs fast adders

Question 6 [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
The usual implementation of the carry circuit involves .....
A
And & or gates
B
XOR
C
NAND
D
XNOR
Question 6 Explanation: 
In case of full and half adders this method is used.
Question 7 [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
A ..... gate is used to detect the occurrence of an overflow.
A
NAND
B
XOR
C
XNOR
D
AND
Question 7 Explanation: 
The overflow is detected by cn^cn-1 ('^' indicates XOR operation).
Question 8 [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
In a normal adder circuit, the delay obtained in a generation of the output is .....
A
2n + 2
B
2n
C
n + 2
D
None of the mentioned
Question 8 Explanation: 
The 2n delay cause of the carry generation and the 2 delay cause of the XOR operation.
Question 9 [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
The final addition sum of the numbers, 0110 & 0110 is .....
A
1101
B
1111
C
1001
D
1010
Question 10 [CLICK ON ANY CHOICE TO KNOW THE RIGHT ANSWER]
The delay reduced to in the carry look ahead adder is .....
A
5
B
8
C
10
D
2n
There are 10 questions to complete.