Computer organization mcqs parallel ports

 

 Help authour, Buy PDF Ebook   >>>Click Here<<<

Computer organization mcqs parallel ports

Click on any option to know the CORRECT ANSWERS

Question 6
In a 32 bit processor, the A0 bit of the address line is connected to ..... of the parallel port interface.
A
Valid bit
B
Idle bit
C
Interrupt enable bit
D
Status or data register
Education Questions answers


Question 7
The Status flag circuit is implemented using .....
A
RS flip flop
B
D flip flop
C
JK flip flop
D
Xor circuit
UPSC test Questions answers


Question 7 Explanation: 
The circuit is implemented using the edge triggered D flip flop, that is triggered on the rising edge of the valid signal.
Question 8
In the output interface of the parallel port, along with the valid signal ..... is also sent.
A
Data
B
Idle signal
C
Interrupt
D
Acknowledge signal
ICT Questions answers


Question 8 Explanation: 
The idle signal is used to check if the device is idle and ready to receive data.
Question 9
DDR stands for .....
A
Data Direction Register
B
Data Decoding Register
C
Data Decoding Rate
D
None of the mentioned
NTA NET Questions answers


Question 9 Explanation: 
This register is used to control the flow of data from the DATAOUT register.
Question 10
In a general 8-bit parallel interface, the INTR line is connected to .....
A
Status and Control unit
B
DDR
C
Register select
D
None of the mentioned
English literature Questions answers


There are 10 questions to complete.

 

 Download all FREE PDF Ebook >>>CLICK HERE<<<