Computer organization mcqs performance caches

 

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Computer organization mcqs performance caches

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Question 6
The memory transfers between two variable speed devices are always done at the speed of the faster device.
A
True
B
False
English grammar Questions answers


Question 7
An effective to introduce parallelism in memory access is by .....
A
Memory interleaving
B
TLB
C
Pages
D
Frames
Education Questions answers


Question 7 Explanation: 
Interleaving divides the memory into modules.
Question 8
The performance of the system is greatly influenced by increasing the level 1 cache.
A
True
B
False
GK Questions answers


Question 8 Explanation: 
This is so because the L1 cache is onboard the processor.
Question 9
Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster.
A
A
B
B
C
Both take the same time
D
Insufficient information
Puzzles Questions answers


Question 10
If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is a term of the Basic performance equation).
A
3
B
~2
C
~1
D
6
Education Questions answers


Question 10 Explanation: 
Pipelining is a process of fetching an instruction during the execution of other instruction.
There are 10 questions to complete.

 

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