Computer organization mcqs static memories

 

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Computer organization mcqs static memories

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Question 1
The duration between the read and the mfc signal is .....
A
Access time
B
Latency
C
Delay
D
Cycle time
Data interpretation (DI) Questions answers

Question 1 Explanation: 
The time between the issue of a read signal and the completion of it is called memory access time.
Question 2
The minimum time delay between two successive memory read operations is .....
A
Cycle time
B
Latency
C
Delay
D
None of the mentioned
Public administration Questions answers

Question 2 Explanation: 
The Time taken by the cpu to end one read operation and to start one more is cycle time.
Question 3
MFC is used to .....
A
Issue a read signal
B
Signal to the device that the memory read operation is complete
C
Signal the processor the memory operation is complete
D
Assign a device to perform the read operation
Computer science Questions answers

Question 3 Explanation: 
The MFC stands for memory Function Complete.
Question 4
..... is the bottleneck, when it comes computer performance.
A
Memory access time
B
Memory cycle time
C
Delay
D
Latency
Civics Test Questions answers

Question 4 Explanation: 
The processor can execute instructions faster than they're fetched, hence cycle time is the bottleneck for performance.
Question 5
The logical addresses generated by the cpu are mapped onto physical memory by .....
A
Relocation register
B
TLB
C
MMU
D
None of the mentioned
NTA NET Questions answers

Question 5 Explanation: 
The MMU stands for memory management unit, which is used to map logical address onto the physical address.
There are 5 questions to complete.

 

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